The nonlinear vector precoding (VP) technique has been proven to achieve close-to-capacity performance in multiuser multipleinput\r\nmultiple-output (MIMO) downlink channels. The performance benefit with respect to its linear counterparts stems from\r\nthe incorporation of a perturbation signal that reduces the power of the precoded signal. The computation of this perturbation\r\nelement, which is known to belong in the class of NP-hard problems, is the main aspect that hinders the hardware implementation\r\nof VP systems. To this respect, several tree-search algorithms have been proposed for the closest-point lattice search problem in VP\r\nsystems hitherto. Nevertheless, the optimality of these algorithms has been assessedmainly in terms of error-rate performance and\r\ncomputational complexity, leaving the hardware cost of their implementation an open issue.Theparallel data-processing capabilities\r\nof field-programmable gate arrays (FPGA) and the loopless nature of the proposed tree-search algorithms have enabled an efficient\r\nhardware implementation of a VP system that provides a very high data-processing throughput.
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